@leaveye
2026-04-02T07:32:20.000000Z
字数 17687
阅读 75
音频 问题 ss528 aic3104 质量
在设备进行输入接口切换时，具体逻辑会在日志中打印。有
AIC3104: xxx字样。
程序启动时调用 aic3104_init()
void aic3104_init(void) {static uint sample_rate = -1U;if (sample_rate == -1U) sample_rate = atoi(rx_loadenv(AUDIO_IO_SRATE));// ... 一些未执行的过期代码 ...aic3104_regfieldset(1, 0b10000000, 1); // Reset/*with PLL: $f_\tt{S} = \frac{R \times \underline{J.D} \times f_{\tt{PLLCLK}}}{2048 \times P}$limits: $\begin{array}{cl}\\\beta & = & f_{\tt{PLLCLK}} / P \text{ where } \left\{ \begin{array}{cl}\beta & \in [10\text{M},20\text{M}]\\\beta \times \underline{J.D} \times R & \in [80\text{M},110\text{M}] \\\end{array} \right.\\J & \in & [4,11] \\R & = & 1 \\\end{array}$see: https://latexeditor.lagrida.com/*/switch (sample_rate) {#define CASE_PLL(RATE,PLLVALS) \case RATE: aic3104_memset(3, PLLVALS); breakdefault: aic3104_memset(3, "\x81\x20\x00\x00");break;CASE_PLL(96000, "\x80\x64\x00\x00"); // 10000000 01100100 00000000 00000000CASE_PLL(48000, "\x91\x20\x1E\x00"); // 10000001 00100000 00011110 00000000CASE_PLL(44100, "\x81\x40\x00\x00"); // 10000001 01000000 00000000 00000000// PLL Enabled ^QQQQPPP JJJJJJ00 DDDDDDDD DDDDDD00#undef CASE_PLL}aic3104_regfieldset(19, 0b00000100, 1); // L-ADC onaic3104_regfieldset(22, 0b00000100, 1); // R-ADC onaic3104_regfieldset(7, 0b00011110, 0b0101); // L/R Chan -> DACaic3104_regfieldset(37, 0b11000000, 0b11); // L/R-DAC on}
音频输入流水线初始化时
{constexpr auto zero_point = 80; // aic3104 0dB split pointaic3104_tune(AWGT_TUNE_IN_GAIN, zero_point);aic3104_tune(AWGT_TUNE_IN_1, zero_point);aic3104_tune(AWGT_TUNE_IN_2, zero_point);const auto &debug_gain = gain_multiplier;RX_INFO("AI Gain: %.4fdB x%.1lf", again_get_db(debug_gain), again_get_mul(debug_gain));}
不同板卡 MIC-in 的配置代码
void aic3104_tune(const Aic3104Widget widget, const int value) {const struct aic3104_settings *settings = aic3104_get_settings();switch (widget) {case AWGT_TUNE_IN_GAIN: {// value >20 may give more noise on boardAic3104StateUint *uv = &aic3104_get_state(AWGT_TUNE_IN_GAIN)->as_uvalue;uv->gain = lerp_i32(value, URANGE_IVOLUME_HIPART, settings->PGA_gain);AIC_INFO("set PGA gain %.1f dB", index2db(uv->gain, PGA_gain));aic3104_regfieldset(15, 0b01111111, uv->gain);aic3104_regfieldset(16, 0b01111111, uv->gain);} return;// CT800:LINE1 / CP800:MICcase AWGT_TUNE_IN_MIC: {const bool enable = aic3104_get_state(AWGT_SWITCH_IN_MIC)->as_bool;Aic3104StateUint *uv = &aic3104_get_state(AWGT_TUNE_IN_MIC)->as_uvalue;uv->level = lerp_i32(value, URANGE_IVOLUME_LOPART, settings->Line1L_level);const uint in_level = !enable || uv->level > 8 ? 0xF : uv->level;#if BOARD_IS_BASELINE(USING_BOARD) // 包含 CT800V30 等早期主线硬件型号if (!enable) AIC_INFO("mute Line1L-ADC");else AIC_INFO("set Line1L-ADC gain %.1f dB", index2db(uv->level, ADC_level));aic3104_regfieldset(19, 0b01111000, in_level);aic3104_regfieldset(24, 0b01111000, in_level);#elif USING_BOARD == CP800_SS528 // 仅 CP800 时if (!enable) AIC_INFO("mute Line1L-ADC");else AIC_INFO("set Line1-ADC gain %.1f dB", index2db(uv->level, ADC_level));aic3104_regfieldset(19, 0b01111000, in_level);aic3104_regfieldset(22, 0b01111000, in_level);#endif} return;// CT800:LINE2 / CP800:LINEcase AWGT_TUNE_IN_LINE: {const bool enable = aic3104_get_state(AWGT_SWITCH_IN_LINE)->as_bool;Aic3104StateUint *uv = &aic3104_get_state(AWGT_TUNE_IN_LINE)->as_uvalue;uv->level = lerp_i32(value, URANGE_IVOLUME_LOPART, settings->Line2_level);const uint in_level = !enable || uv->level > 8 ? 0xF : uv->level;if (!enable) AIC_INFO("mute Line2-ADC");else AIC_INFO("set Line2-ADC gain %.1f dB", index2db(uv->level, ADC_level));aic3104_regfieldset(17, 0b11110000, in_level);aic3104_regfieldset(18, 0b00001111, in_level);} return;...}
通道切换时（初始化为都不开，第一次读到配置后进行初始化/第一次切换）
auto &use = mpp_aio_context()->ai_input;const auto want = getValue();if (use != want) {RX_NOTICE("adjust AI:PORT: %s --> %s", uintf_name(use), uintf_name(want));use = want;switch (want) {default:break;case UINTF_AIN_MIC:aic3104_switch(AWGT_SWITCH_IN_1, true);aic3104_switch(AWGT_SWITCH_IN_2, false);break;case UINTF_AIN_LINE:aic3104_switch(AWGT_SWITCH_IN_1, false);aic3104_switch(AWGT_SWITCH_IN_2, true);break;}}
void aic3104_switch(const Aic3104Widget widget, bool state) {switch (widget) {case AWGT_SWITCH_IN_PGA: {bool *enable = &aic3104_get_state(widget)->as_bool;*enable = !!state;AIC_INFO("%s PGA", state ? "unmute" : "mute");aic3104_regfieldset(15, 0b10000000, !*enable);aic3104_regfieldset(16, 0b10000000, !*enable);} return;case AWGT_SWITCH_IN_ADC: {bool *enable = &aic3104_get_state(widget)->as_bool;*enable = !!state;AIC_INFO("%s ADC", state ? "unmute" : "mute");aic3104_regfieldset(19, 0b00000100, *enable);aic3104_regfieldset(22, 0b00000100, *enable);} return;case AWGT_SWITCH_OUT_DAC: {bool *enable = &aic3104_get_state(widget)->as_bool;*enable = !!state;AIC_INFO("%s DAC", state ? "unmute" : "mute");aic3104_regfieldset(43, 0b10000000, !*enable);aic3104_regfieldset(44, 0b10000000, !*enable);} return;// =AWGT_SWITCH_IN_1case AWGT_SWITCH_IN_MIC: {bool *enable = &aic3104_get_state(widget)->as_bool;const Aic3104StateUint *uv = &aic3104_get_state(AWGT_TUNE_IN_MIC)->as_uvalue;*enable = !!state;const uint in_level = !state || uv->level > 8 ? 0xF : uv->level;aic3104_switch(AWGT_SWITCH_IN_PGA, false);aic3104_switch(AWGT_SWITCH_IN_ADC, false);#if BOARD_IS_BASELINE(USING_BOARD)AIC_INFO("set MICBIAS=AVDD");aic3104_regfieldset(25, 0xFF, 0xC0); // MICBIAS=AVDDAIC_INFO("set LineL1P to diff-mode");aic3104_regfieldset(19, 0b10000000, 1); // Line1L P/M diff-modeaic3104_regfieldset(24, 0b10000000, 1); // Line1L P/M diff-modeAIC_INFO("%s LineL1P to PGA-L/R", state ? "route" : "cut");aic3104_regfieldset(19, 0b01111000, in_level); // Line1L --> L-PGAaic3104_regfieldset(24, 0b01111000, in_level); // Line1L --> R-PGA#elif USING_BOARD == CP800_SS528AIC_INFO("set MICBIAS=AVDD");aic3104_regfieldset(25, 0xFF, 0xC0); // MICBIAS=AVDDAIC_INFO("set LineL1 to single-ended-mode");aic3104_regfieldset(19, 0b10000000, 0); // Line1L P single-ended-modeaic3104_regfieldset(22, 0b10000000, 0); // Line1R P single-ended-modeAIC_INFO("%s LineL1-L/R to PGA-L/R", state ? "route" : "cut");aic3104_regfieldset(19, 0b01111000, in_level); // Line1L --> L-PGAaic3104_regfieldset(22, 0b01111000, in_level); // Line1R --> R-PGA#endifaic3104_switch(AWGT_SWITCH_IN_ADC, true);aic3104_switch(AWGT_SWITCH_IN_PGA, true);} return;// =AWGT_SWITCH_IN_2case AWGT_SWITCH_IN_LINE: {bool *enable = &aic3104_get_state(widget)->as_bool;const Aic3104StateUint *uv = &aic3104_get_state(AWGT_TUNE_IN_LINE)->as_uvalue;*enable = !!state;const uint in_level = !state || uv->level > 8 ? 0xF : uv->level;aic3104_switch(AWGT_SWITCH_IN_PGA, false);aic3104_switch(AWGT_SWITCH_IN_ADC, false);AIC_INFO("%s Line2-L/R to PGA-L/R", state ? "route" : "cut");aic3104_regfieldset(17, 0b00001111, 0xF); // Line2R --x-> L-PGAaic3104_regfieldset(18, 0b11110000, 0xF); // Line2L --x-> R-PGAaic3104_regfieldset(17, 0b11110000, in_level); // Line2L ----> L-PGAaic3104_regfieldset(18, 0b00001111, in_level); // Line2R ----> R-PGAaic3104_switch(AWGT_SWITCH_IN_ADC, true);aic3104_switch(AWGT_SWITCH_IN_PGA, true);} return;...}
全局配置表，对不同设备没有任何不同。某两项由环境变量读取。
struct aic3104_settings {struct int_region PGA_gain; //!< [0,119] means 0dB~59.5dB +.5dBstruct int_region Line1L_level; //!< our Mic-In. [8,0] means -12dB~0dB +1.5dB, 15=not-connectedstruct int_region Line2_level; //!< our Line-In. [8,0] means -12dB~0dB +1.5dB, 15=not-connectedstruct int_region DAC_dvolume; //!< [127,0] means -63.5dB~0dB +.5dBstruct int_region DAC_LLOP_avolume; //!< our Line1-Out. [117,0] means -78.3dB~0dB, 118=mutestruct int_region LLOP_level; //!< our Line1-Out. [0,9] means 0dB~9dB, 10=mutestruct int_region DAC_HPOUT_avolume; //!< our Line2-Out. [117,0] means -78.3dB~0dB, 118=mutestruct int_region HPOUT_level; //!< our Line2-Out. [0,9] means 0dB~9dB, 10=mutefloat end_of_table;const float *PGA_gain_table;const float *ADC_level_table;const float *DAC_volume_table;const float *Out_volume_table;} *aic3104_get_settings() {static struct aic3104_settings settings = {};static bool inited = false;#define DEBUG_AIC3104_0DB "true"//! P0, R15/R16 ADC-PGA 增益最大值。过高可能引入更多底噪。曾经为 20#define MAX_ADC_PGA_GAIN "32"if (!inited) {if (strcasecmp("true", rx_loadenv(DEBUG_AIC3104_0DB)) == 0) {settings.PGA_gain.min = 0;settings.PGA_gain.max = clamp_i32(atoi(rx_loadenv(MAX_ADC_PGA_GAIN)), 20, 127);settings.Line1L_level.min = 8;settings.Line1L_level.max = 0; // noisy if <6settings.Line2_level.min = 8;settings.Line2_level.max = 0; // noisy if <4, was 2settings.DAC_dvolume.min = 127;settings.DAC_dvolume.max = 0; // noisy if >5settings.DAC_LLOP_avolume.min = 118;settings.DAC_LLOP_avolume.max = 0; // noisy if >1settings.LLOP_level.min = 0;settings.LLOP_level.max = 9;settings.DAC_HPOUT_avolume.min = 118;settings.DAC_HPOUT_avolume.max = 0; // noisy if >12settings.HPOUT_level.min = 0;settings.HPOUT_level.max = 9; // noisy if <4} else {// 未启用分支// ...}settings.end_of_table = END_OF_TABLE;settings.PGA_gain_table = aic3104__PGA_gain_table;settings.ADC_level_table = aic3104__ADC_level_table;settings.DAC_volume_table = aic3104__DAC_volume_table;settings.Out_volume_table = aic3104__Out_volume_table;}return &settings;}
调整之前（mic>line 导致可能削峰）
1970-01-02 03:46:06.849098 NOTICE - update AENC_INPUT: mic (was line) <<ALGO#rxlib.cc:2951970-01-02 03:46:06.860278 NOTICE - adjust AI:PORT: AIN-LINE --> AIN-MIC <<ALGO#aiencsend.cc:9781970-01-02 03:46:06.860332 INFO - AIC3104: mute PGA <<ALGO#tlv320aic31.c:7291970-01-02 03:46:06.861258 INFO - AIC3104: R15, 00h --> 80h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.862141 INFO - AIC3104: R16, 00h --> 80h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.862158 INFO - AIC3104: mute ADC <<ALGO#tlv320aic31.c:7371970-01-02 03:46:06.863031 INFO - AIC3104: R19, 7Ch --> 78h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.863906 INFO - AIC3104: R22, 7Ch --> 78h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.863921 INFO - AIC3104: set MICBIAS=AVDD <<ALGO#tlv320aic31.c:7771970-01-02 03:46:06.864794 INFO - AIC3104: R25, C6h --> C0h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.864809 INFO - AIC3104: set LineL1 to single-ended-mode <<ALGO#tlv320aic31.c:7791970-01-02 03:46:06.865305 INFO - AIC3104: R19, 78h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:06.865803 INFO - AIC3104: R22, 78h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:06.865817 INFO - AIC3104: route LineL1-L/R to PGA-L/R <<ALGO#tlv320aic31.c:7821970-01-02 03:46:06.866689 INFO - AIC3104: R19, 78h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.867562 INFO - AIC3104: R22, 78h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.867576 INFO - AIC3104: unmute ADC <<ALGO#tlv320aic31.c:7371970-01-02 03:46:06.868448 INFO - AIC3104: R19, 00h --> 04h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.869323 INFO - AIC3104: R22, 00h --> 04h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.869338 INFO - AIC3104: unmute PGA <<ALGO#tlv320aic31.c:7291970-01-02 03:46:06.870230 INFO - AIC3104: R15, 80h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.871111 INFO - AIC3104: R16, 80h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.871127 INFO - AIC3104: mute PGA <<ALGO#tlv320aic31.c:7291970-01-02 03:46:06.872000 INFO - AIC3104: R15, 00h --> 80h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.872874 INFO - AIC3104: R16, 00h --> 80h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.872889 INFO - AIC3104: mute ADC <<ALGO#tlv320aic31.c:7371970-01-02 03:46:06.873772 INFO - AIC3104: R19, 04h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.874647 INFO - AIC3104: R22, 04h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.874661 INFO - AIC3104: cut Line2-L/R to PGA-L/R <<ALGO#tlv320aic31.c:7971970-01-02 03:46:06.875158 INFO - AIC3104: R17, 0Fh (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:06.875657 INFO - AIC3104: R18, F0h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:06.876530 INFO - AIC3104: R17, 0Fh --> FFh <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.877403 INFO - AIC3104: R18, F0h --> FFh <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.877418 INFO - AIC3104: unmute ADC <<ALGO#tlv320aic31.c:7371970-01-02 03:46:06.878289 INFO - AIC3104: R19, 00h --> 04h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.879172 INFO - AIC3104: R22, 00h --> 04h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.879187 INFO - AIC3104: unmute PGA <<ALGO#tlv320aic31.c:7291970-01-02 03:46:06.880076 INFO - AIC3104: R15, 80h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:46:06.880956 INFO - AIC3104: R16, 80h --> 00h <<ALGO#tlv320aic31.c:41
调整之后
1970-01-02 03:27:22.820489 NOTICE - adjust AI:PORT: AIN-LINE --> AIN-MIC <<ALGO#aiencsend.cc:9781970-01-02 03:27:22.820546 INFO - AIC3104: mute PGA <<ALGO#tlv320aic31.c:7671970-01-02 03:27:22.821534 INFO - AIC3104: R15, 00h --> 80h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.822428 INFO - AIC3104: R16, 00h --> 80h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.822449 INFO - AIC3104: mute ADC <<ALGO#tlv320aic31.c:7751970-01-02 03:27:22.823558 INFO - AIC3104: R19, 7Ch --> 78h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.824451 INFO - AIC3104: R22, 7Ch --> 78h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.824472 INFO - AIC3104: set MICBIAS=AVDD <<ALGO#tlv320aic31.c:8051970-01-02 03:27:22.825352 INFO - AIC3104: R25, C6h --> C0h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.825371 INFO - AIC3104: set LineL1 to single-ended-mode <<ALGO#tlv320aic31.c:8071970-01-02 03:27:22.825934 INFO - AIC3104: R19, 78h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:27:22.826444 INFO - AIC3104: R22, 78h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:27:22.826460 INFO - AIC3104: route LineL1-L/R to PGA-L/R <<ALGO#tlv320aic31.c:8101970-01-02 03:27:22.827424 INFO - AIC3104: R19, 78h --> 20h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.828307 INFO - AIC3104: R22, 78h --> 20h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.828327 INFO - AIC3104: unmute ADC <<ALGO#tlv320aic31.c:7751970-01-02 03:27:22.829205 INFO - AIC3104: R19, 20h --> 24h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.830115 INFO - AIC3104: R22, 20h --> 24h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.830139 INFO - AIC3104: unmute PGA <<ALGO#tlv320aic31.c:7671970-01-02 03:27:22.831020 INFO - AIC3104: R15, 80h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.831902 INFO - AIC3104: R16, 80h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.831922 INFO - AIC3104: mute PGA <<ALGO#tlv320aic31.c:7671970-01-02 03:27:22.832800 INFO - AIC3104: R15, 00h --> 80h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.833912 INFO - AIC3104: R16, 00h --> 80h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.833943 INFO - AIC3104: mute ADC <<ALGO#tlv320aic31.c:7751970-01-02 03:27:22.834826 INFO - AIC3104: R19, 24h --> 20h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.835707 INFO - AIC3104: R22, 24h --> 20h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.835726 INFO - AIC3104: cut Line2-L/R to PGA-L/R <<ALGO#tlv320aic31.c:8251970-01-02 03:27:22.836243 INFO - AIC3104: R17, 0Fh (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:27:22.836751 INFO - AIC3104: R18, F0h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:27:22.837629 INFO - AIC3104: R17, 0Fh --> FFh <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.838511 INFO - AIC3104: R18, F0h --> FFh <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.838532 INFO - AIC3104: unmute ADC <<ALGO#tlv320aic31.c:7751970-01-02 03:27:22.839411 INFO - AIC3104: R19, 20h --> 24h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.840324 INFO - AIC3104: R22, 20h --> 24h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.840351 INFO - AIC3104: unmute PGA <<ALGO#tlv320aic31.c:7671970-01-02 03:27:22.841476 INFO - AIC3104: R15, 80h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:27:22.842381 INFO - AIC3104: R16, 80h --> 00h <<ALGO#tlv320aic31.c:41
此时 line-in 不变
1970-01-02 03:46:00.821047 NOTICE - adjust AI:PORT: (undefined:0) --> AIN-LINE <<ALGO#aiencsend.cc:9781970-01-02 03:46:00.821077 INFO - AIC3104: mute PGA <<ALGO#tlv320aic31.c:7291970-01-02 03:46:00.821618 INFO - AIC3104: R15, 80h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:00.822155 INFO - AIC3104: R16, 80h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:00.822183 INFO - AIC3104: mute ADC <<ALGO#tlv320aic31.c:7371970-01-02 03:46:00.823101 INFO - AIC3104: R19, 7Ch --> 78h <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.824021 INFO - AIC3104: R22, 7Ch --> 78h <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.824054 INFO - AIC3104: set MICBIAS=AVDD <<ALGO#tlv320aic31.c:7771970-01-02 03:46:00.824965 INFO - AIC3104: R25, 06h --> C0h <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.825006 INFO - AIC3104: set LineL1 to single-ended-mode <<ALGO#tlv320aic31.c:7791970-01-02 03:46:00.825481 INFO - open link(IXS:Option{ UL A:MP2 #0 WO }) ... ok(0x7fa800eb50) <<ALGO#rxlib.cc:1321970-01-02 03:46:00.825525 INFO - AIC3104: R19, 78h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:00.826037 INFO - AIC3104: R22, 78h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:00.826063 INFO - AIC3104: cut LineL1-L/R to PGA-L/R <<ALGO#tlv320aic31.c:7821970-01-02 03:46:00.826490 DEBUG - AINPUT#0: init done <<ALGO#aiencsend.cc:4711970-01-02 03:46:00.826577 INFO - AIC3104: R19, 78h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:00.827091 INFO - AIC3104: R22, 78h (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:00.827107 INFO - AIC3104: unmute ADC <<ALGO#tlv320aic31.c:7371970-01-02 03:46:00.827981 INFO - AIC3104: R19, 78h --> 7Ch <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.828856 INFO - AIC3104: R22, 78h --> 7Ch <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.828871 INFO - AIC3104: unmute PGA <<ALGO#tlv320aic31.c:7291970-01-02 03:46:00.829743 INFO - AIC3104: R15, 80h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.830878 INFO - AIC3104: R16, 80h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.830897 INFO - AIC3104: mute PGA <<ALGO#tlv320aic31.c:7291970-01-02 03:46:00.831769 INFO - AIC3104: R15, 00h --> 80h <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.832643 INFO - AIC3104: R16, 00h --> 80h <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.832661 INFO - AIC3104: mute ADC <<ALGO#tlv320aic31.c:7371970-01-02 03:46:00.833535 INFO - AIC3104: R19, 7Ch --> 78h <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.834408 INFO - AIC3104: R22, 7Ch --> 78h <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.834424 INFO - AIC3104: route Line2-L/R to PGA-L/R <<ALGO#tlv320aic31.c:7971970-01-02 03:46:00.834923 INFO - AIC3104: R17, FFh (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:00.835421 INFO - AIC3104: R18, FFh (unchanged) <<ALGO#tlv320aic31.c:371970-01-02 03:46:00.836294 INFO - AIC3104: R17, FFh --> 0Fh <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.837168 INFO - AIC3104: R18, FFh --> F0h <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.837182 INFO - AIC3104: unmute ADC <<ALGO#tlv320aic31.c:7371970-01-02 03:46:00.838053 INFO - AIC3104: R19, 78h --> 7Ch <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.838926 INFO - AIC3104: R22, 78h --> 7Ch <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.838941 INFO - AIC3104: unmute PGA <<ALGO#tlv320aic31.c:7291970-01-02 03:46:00.839812 INFO - AIC3104: R15, 80h --> 00h <<ALGO#tlv320aic31.c:411970-01-02 03:46:00.840941 INFO - AIC3104: R16, 80h --> 00h <<ALGO#tlv320aic31.c:41