Computer Network Homework 2

computer homework

---

4.1 Suppose that data are stored on 1.4-Mbyte floppy diskettes that weigh 30 g each. Suppose that an airliner carries of these floppies at a speed of 1000 km/h over a distance of 5000 km. What is the data transmission rate in bits per second of this system?

Answer:

$$\frac{\frac{10^4 * 10^3}{30} * 1.4 * 1024 * 1024 * 8}{5 * 3600} = 217Mbps$$


6.1 Suppose a file of 10,000 bytes is to be sent over a line at 2400 bps.
a. Calculate the overhead in bits and time in using asynchronous communication. Assume one start bit and a stop element of length one bit, and 8 bits to send the byte itself for each character. The 8-bit character consists of all data bits, with no parity bit.
b. Calculate the overhead in bits and time using synchronous communication. Assume that the data are sent in frames. Each frame consists of 1000 characters 8000 bits and an overhead of 48 control bits per frame.
c. What would the answers to parts (a) and (b) be for a file of 100,000 characters?
d. What would the answers to parts (a) and (b) be for the original file of 10,000 characters except at a data rate of 9600 bps?

Answer:

a:
Each character has 20% overhead. So 10000 characters have 20000 extra bits. It would take an extra $20000/2400=8.33 seconds$

b:
10 frames take 480 extra bits.It would take an extra $480/2400=0.2seconds$

c:

• For part (a): It will take 83.33 seconds.
• For part (2): It will take 2 seconds.

d:

• For part (a): It will take $20000/9600=2.083seconds$
• For part (b): It will take $480/9600 = 0.05seconds$

6.8 Two communicating devices are using a single-bit even parity check for error detection. The transmitter sends the byte 10101010 and, because of channel noise, the receiver gets the byte 10011010. Will the receiver detect the error? Why or why not?

Answer:

The receiver will not detect the error. Because there are two bits has been changed.


6.14 A CRC is constructed to generate a 4-bit FCS for an 11-bit message. The generator polynomial is $X^4 + X^3 + 1$
a. Draw the shift register circuit that would perform this task (see Figure 6.6).
b. Encode the data bit sequence 10011011100 (leftmost bit is the least significant) using the generator polynomial and give the codeword.
c. Now assume that bit 7 (counting from the LSB) in the codeword is in error and show that the detection algorithm detects the error.

Answer:

a:

b:
Data = 10011011100

$$M(X)=1 + X^3 + X^4 + X^6+X^7+X^8$$
$$X^4M(X)=X^{12}+X^{11}+X^{10}+X^8+X^7+X^4$$
$$\frac{X^4M(X)}{P(X)}=X^{12}+X{11}+X{10}+X{8}+X{7}+\frac{X^2}{P(X)}$$
$$R(X)=X^2$$
$$T(X)=X^4M(X) + R(X) = X^{12}+X{11}+X{10}+X{8}+X{7}+X^4+X^2$$
$CODE=001010011011100$
c:
$CODE=001010001011100$
$\frac{T(X)}{P(X)}$is nonzero remainder.


6.15:
a. In a CRC error-detecting scheme, choose $p(x) = x^4 +x + 1$ Encode the bits 10010011011.
b. Suppose the channel introduces an error pattern 100010000000000 (i.e., a flip from 1 to 0 or from 0 to 1 in position 1 and 5). What is received? Can the error be detected?
c. Repeat part (b) with error pattern 100110000000000

Answer:

a.
100100110110000 / 11001 = 11101001010 ... 1010
b.
00011011011 / 11001 = 1001 ... 1010
c.
00001011011 / 11001 = 110 ... 1101

7.2:
The number of bits on a transmission line that are in the process of actively being transmitted (i.e.,the number of bits that have been transmitted but have not yet been received) is referred to as the bit length of the line. Plot the line distance versus the transmission speed for a bit length of 1000 bits.Assume a propagation velocity of 2 * 108 m/s
Answer:

$$\frac{d}{2*10^8m/s}=\frac{1000bit}{R}$$
$$d*R=2*10^8km/s *bit$$

7.5:

Answer:

A to B:

Propagation time = $4000 * 5=20msec$
Transmission time per frame = $\frac{1000}{100*10^3}=10msec$

B to C:

Propagation time = $1000 * 5 = 4 msec$
Transmission time per frame = $x$ = $1000/R$
R = data rate between B and C (unknown)
So we get:
$30 + 3x = 50$
$x=6.66msec$
$R = 1000 / x = 150kbps$


10.3:
Consider a three-stage switch such as Figure 10.6. Assume that there are a total of N input lines and N output lines for the overall three-stage switch. If n is the number of input lines to a stage 1 crossbar and the number of output lines to a stage 3 crossbar, then there are N/n stage 1 crossbars and N/n stage 3 crossbars. Assume each stage 1 crossbar has one output line going to each stage 2 crossbar, and each stage 2 crossbar has one output line going to each stage 3 crossbar. For such a configuration it can be shown that, for the switch to be nonblocking, the number of stage 2 crossbar matrices must equal
a. What is the total number of crosspoints among all the crossbar switches?
b. For a given value of N, the total number of crosspoints depends on the value of n.That is, the value depends on how many crossbars are used in the first stage tohandle the total number of input lines. Assuming a large number of input lines to each crossbar (large value of n), what is the minimum number of crosspoints for a
nonblocking configuration as a function of n?
c. For a range of N from to plot the number of crosspoints for a single-stage switch and an optimum three-stage crossbar switch.

Answer:

I don't know how to answer it...:(
Sorry about that.


10.5:
Define the following parameters for a switching network:
D = propagation delay per hop in seconds
S = call setup time (circuit switching or virtual circuit) in seconds
H = overhead (header) bits per packet
P = fixed packet size, in bits
B = data rate, in bits per second (bps), on all links
L = message length in bits
N = number of hops between two given end systems
a. For compute the end-to-end delay for circuit switching, virtual circuit packet switching, and datagram packet switching. Assume that there are no acknowledgments.Ignore processing delay at the nodes.
b. Derive general expressions for the three techniques of part (a), taken two at a time (three expressions in all), showing the conditions under which the delays are equal.

Answer:

Circuit Switching

$$time = Call setup time + Message Delivery time$$
$$time = Call setup time + Propagation Delay + Transmission Time$$
$$time = N*D + L/B = 0.537sec$$
Datagram Packet Switching
time = Time to Transmit and Deliver all packets through first hop +Time to Deliver last packet across second hop
+Time to Deliver last packet across third hop
+Time to Deliver last packet across forth hop
$$3200/(1024-16) = 4 packets$$
time1 = 4 * transmission time for one packet + propagation delay for one hop
time1 = $4 * (P/B) + D = 0.428$
time2 = transmission time for one packet + propagation delay for one hop = 0.108
time = time1+time2 = 0.752sec
Virtual Circuit Packet Switching
T = Call setup time + Datagram Packet Switching Time
$T = S + 0.752 = 0.952 sec$
b.
Circuit Switching and Diagram Packet Switchin
$$Tc = S + N * D + L/B$$
Td = Time to Transmit and Deliver all packets through first hop + (N-1) * Time to Deliver last packet through a hop
$$Td = (Np + N-1)(P/B) + N*D$$
$$S + L/B = (Np + N -1)(P/N)$$

Circuit Switching and Virtual Circuit Packet

$$Tv = S + Td$$
$$Tc = Tv$$
$$L/B = (Np + N - 1)(P/B)$$

Datagram and Virtual Circuit Packet Switching

$$Td = Tv - S$$


10.6: What value of P, as a function of N, L, and H, results in minimum end-to-end delay on a datagram network? Assume that L is much larger than P, and D is zero.

Answer:

$$T(dps) = (Np+N-1)*(P/B) + N*D = (Np+N-1)*(P/B)$$
$$Np = L / (P – H)$$
$$T(dps) = (L/(P – H) + N – 1)*(P/B)$$
$$dT(dps)/d(P) = 0$$
$$(P-H)^2 = LH/(N-1)$$